TSMC to Lift Chip Prices Up to 10% From 2027, Nikkei Reports
TL;DR
- Negotiations closed June-July 2026, locking all customers into January 2027 implementation with no renegotiation window remaining.
- HPC overflow orders above committed volumes face a combined ceiling of up to 25%, stacking a 10-15% surcharge on the baseline hike.
- Mature nodes (12nm-28nm) face the full 10% increase, extending cost pressure to automotive, industrial, and mid-range consumer chips beyond AI.
TSMC is telling customers that wafer prices are going up again in 2027, and this time the increase reaches into the mature nodes as well as the leading edge. According to Nikkei Asia's reporting, base price increases will run in the 5% to 10% range depending on customer and product, take effect at the start of 2027, and cover both advanced and mature production. Negotiations reportedly began in June and wrapped in July.
The more interesting piece is the mature-node hike. 12nm, 16nm and 28nm face increases of up to 10%, which is described as the first broad mature-node price increase in more than three years. That matters because mature nodes are where automotive, industrial and consumer parts live, and those customers have been used to fairly stable pricing while all the drama happened at 3nm and 2nm. If TSMC is pushing through 10% there too, the cost pressure is not just an AI-margin story.
On the leading edge, coverage from Tom's Hardware frames this as hitting "all advanced nodes," which it puts at about 74% of TSMC's wafer business, with Nvidia, AMD, Apple and Qualcomm on the receiving end. TSMC's stated rationale is rising costs for materials, manufacturing equipment, and construction of new plants overseas, meaning the Arizona, Kumamoto and Dresden fabs the company has been standing up outside Taiwan. A TSMC spokesperson's line, as reported by The Star, is that "Our pricing strategy is strategic, not opportunistic."
The honest caveat is that this is single-sourced reporting via Nikkei citing unnamed sources, TSMC does not confirm pricing, and the article does not break the 5-10% band down by specific node, by customer tier, or by geography of the fab producing the wafer. Take the range as reported, not as a settled schedule. What the reporting also does not give you is how much of the hike is genuinely input-cost recovery versus TSMC exercising the pricing power its roughly 90% share at the leading nodes affords it.
Either way, if you are a fabless design house planning 2027 product margin, the assumption of flat wafer pricing is gone, and the second-source conversations at Samsung and Intel Foundry just got a bit more oxygen.
What others are reporting
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Reuters Read →
Wire corroboration with TSMC spokesperson comment and C.C. Wei's June pricing signals; adds per-node breakdown covering both mature and advanced tiers.
Our pricing strategy is strategic, not opportunistic. We will continue to work closely with customers and sell our value to them.
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Tom's Hardware Read →
Headlines the 25% HPC overflow surcharge ceiling rather than the baseline, making the tiered pricing structure the lead rather than a footnote.
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Investing.com Read →
Adds sell-side validation from Morgan Stanley, TSMC Q2 results ($40.2B revenue, 67.7% gross margin), and the $100B Arizona capex as structural cost drivers.
We expect TSMC could increase leading-edge wafer pricing by another 5%-10% in 2027. — Morgan Stanley analyst Charlie Chan
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Digital Trends Read →
Consumer cascade framing: quantifies the wafer cost jump ($19,500 to ~$21,450) and names Apple, Qualcomm, and Samsung as the companies absorbing costs before passing them to device buyers.
Raise chip prices between 5% and 10%, depending on the customer and the chip, starting in 2027.
Originally reported by asia.nikkei.com
Read the original article →Original headline: TSMC to Raise Chipmaking Prices Up to 10% Starting 2027 as Materials and Overseas Fab Costs Escalate