Broadcom and OpenAI Unveil Jalapeño LLM Inference Chip
TL;DR
- Jalapeño is inference-only; TechCrunch reports OpenAI will keep relying on Nvidia hardware for pre-training workloads.
- Tom's Hardware identifies Jalapeño as a reticle-sized ASIC, placing it at near-maximum manufacturable die size for compute density.
- OpenAI used its own AI models during chip design, compressing a typical multi-year ASIC development cycle to nine months.
Building a chip from scratch specifically for large-language-model inference, rather than adapting an existing general-purpose accelerator, is a deliberate architectural bet. According to reporting on StockTitan, OpenAI and Broadcom have done exactly that with Jalapeño, which OpenAI describes as "OpenAI's first Intelligence Processor: an accelerator architected around OpenAI's vision for the future of LLM inference."
The chip's design philosophy centers on reducing data movement and balancing compute, memory, and networking resources to achieve utilization much closer to theoretical peak performance. The companies describe it as a blank-slate design for modern LLM inference, not a general-purpose accelerator adapted from earlier AI workloads. Engineering samples are reportedly already running ML workloads in the lab at production target frequency and power, including GPT-5.3-Codex-Spark.
The development pace is the figure that stands out most. The companies say Jalapeño went from initial design to manufacturing tape-out in nine months, which they describe as potentially the fastest ASIC development cycle ever achieved in high-performance advanced semiconductors. That timeline compression, if it proves repeatable, changes what it means to iterate on custom silicon at hyperscaler speed.
Deployment is targeted at gigawatt-scale data centers with Microsoft and other partners beginning in 2026. The honest caveat is that the performance-per-watt claims, described as substantially better than current state-of-the-art, are the companies' own, with no independent benchmarks published yet. What the reporting also does not give you is a precise unit count, pricing structure, or a quantitative comparison against competing silicon on real production workloads.
Broadcom, as the co-designer and manufacturing partner, stands to benefit as custom ASIC demand from frontier model operators grows. Shares of AVGO dipped roughly 3% on the announcement day, though reporting attributed the move to broader semiconductor sector weakness rather than to reception of the chip itself.
What others are reporting
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OpenAI Read →
First-party source frames Jalapeño as the first chip in a multi-generation platform; confirms engineering samples running at production target frequency and power.
Jalapeño will deliver performance per watt substantially better than current state-of-the-art.
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CNBC Read →
CNBC frames the launch around OpenAI's vertical integration strategy, citing the company's stated goal of owning the full compute stack from models to silicon.
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TechCrunch Read →
Reports pre-training will still rely on Nvidia; adds Greg Brockman quote on workload-specific design; contextualizes against Google and Amazon custom accelerators.
We have a deep understanding of the workload. We've really been looking for specific workloads that are underserved.
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VentureBeat Read →
Focuses on the AI-assisted design loop as the lead angle; frames the nine-month cycle as a direct product of OpenAI's own models accelerating ASIC development.
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Tom's Hardware Read →
Adds the technical specification that Jalapeño is a reticle-sized ASIC, the largest die size manufacturable in a single lithography exposure, signaling maximum compute density.
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Engadget Read →
Frames this as OpenAI's first step toward controlling its own silicon supply chain, connecting the chip strategy directly to ChatGPT operational economics.
Jalapeño was co-developed from initial design to manufacturing tape-out in just nine months.
Originally reported by stocktitan.net
Read the original article →Original headline: OpenAI and Broadcom Unveil Jalapeño — First LLM-Optimized Inference Chip Built From Blank Slate in Nine Months, Engineering Samples Running GPT-5.3-Codex-Spark Production Workloads