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Cadence Debuts AuraStack, an Agentic AI for PCB Engineers

TL;DR

  • AuraStack is a natural language layer that plans and runs Cadence's PCB simulations across CPUs, GPUs and other accelerators.
  • Cadence's Michael Jackson claims a 15x productivity boost, citing that engineers spend 65 percent of the day navigating tasks.
  • Nvidia is named as an early customer, and Cadence pitches the tool as Claude Code or Codex for hardware design.

The interesting move here is not that Cadence has shipped another AI feature, it is that the company is now framing hardware design as an agentic workflow problem. On July 15 it introduced AuraStack, described by The Register as an agentic AI system built to help electrical engineers design and test printed circuit boards. The pitch is a natural language front end that plans and orchestrates multi step simulation workflows across CPUs, GPUs and other accelerators, drawing on a mix of open and proprietary models under the hood.

Michael Jackson, who runs Cadence's system design and analysis division, put the value case in operational terms. Sixty five percent of an engineer's day, he said, goes to navigating and managing tasks rather than making design decisions. Push that scutwork onto an orchestrator, he argues, and the tool can deliver a 15x productivity boost. He walked through a representative loop: identifying the power management components, building a simulation ready power tree, running the simulation, then feeding the results back to the designer.

The framing Cadence uses is the tell. AuraStack is pitched, in The Register's description, as a bit like Anthropic's Claude Code or OpenAI's Codex, only instead of writing and running code in a sandbox it drives electronic design automation tools. That is a category import from software into hardware, and it lines up with where Nvidia already is, since the chip company is named as an early customer for the service.

The honest caveat is that 15x is a vendor claim rather than an independently benchmarked one, and Cadence already automates a lot of the workflow AuraStack is being credited with speeding up. What the reporting does not give you is pricing, which underlying models ship by default, where inference runs, or how the system compares with parallel efforts from Synopsys or Siemens EDA. Those gaps matter to any design lead weighing seat cost against realistic throughput.

If the productivity story holds up even partially in the field, the bigger story is a category shift. Electronic design automation is starting to look like the next domain where agentic tooling gets a foothold, and the vendors that already own the deepest simulator libraries are best placed to sell the orchestration layer that sits on top.